An especially important aspect of the SMDK is its compatible application programing interface or Compatible API, which allows end users to implement heterogeneous memory strategies, including memory virtualization, under the CXL standard without having to make any changes to application software. Alternatively, a separate Optimization API supports high-level optimization by enabling modification of application software to suit special system needs.
As a result of these efforts, high performance computing (HPC) system developers can now combine traditional DRAM and CXL-based memory such as the Samsung CXL Memory Expander announced in May, to significantly increase memory channel and density limits. The SMDK not only makes adoption of CXL-based memory a far easier and faster process but also opens new possibilities for organizations seeking to manage the exploding quantities of data generated in advanced applications.
CXL: A Significant New Option for Compute Architectures
We’re in an era of exponential growth of data, much of it machine-generated, with increasing amounts of that data being used for AI/ML and other data-intensive tasks that benefit from high-performance low-latency memory. Existing memory architectures are increasingly struggling to provide enough data to keep today’s CPUs and accelerators fully utilized. This is a critical consideration for emerging applications that are highly focused on data and data movement.
The CXL standard promises to help address this by enabling host processors (CPU, GPU, etc.) to access DRAM beyond standard DIMM slots on the motherboard, providing new levels of flexibility for different media characteristics (persistence, latency, bandwidth, endurance, etc.) and different media (DDR4, DDR5, LPDDR5, etc., as well as emerging alternative types).
In particular, CXL provides an interface based on the CXL.io protocol that leverages the PCIe 5.0 physical layer and electrical interfaces to provide extremely low latency interconnect paths — for memory access, communication between host processors, and among devices that need to share memory resources. This opens a range of opportunities; while the Samsung CXL Memory Expander is the first example, potential future avenues could include use of NVDIMM as backup for main memory; asymmetrical sharing of the host’s main memory with CXL-based memory, NVDIMM, and computational storage; and ultimately rack-level CXL-based disaggregation.