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M386A8K40DM2-CTD

lrdimm
lrdimm

Load reduced DIMM
Load reduced DIMM
Load reduced DIMM

Includes a register for enhancing clock, command and control signals
Enhanced data signal by placing data buffer
Best solution for achieving high density with high speed
Supports x4 Organization / up to 4 ranks per DIMM and 3DPC
Application : Server Includes a register for enhancing clock, command and control signals Enhanced data signal by placing data buffer Best solution for achieving high density with high speed Supports x4 Organization / up to 4 ranks per DIMM and 3DPC Application : Server Includes a register for enhancing clock, command and
control signals Enhanced data signal by placing data
buffer Best solution for achieving high density with
high speed Supports x4 Organization / up to 4 ranks
per DIMM and 3DPC Application : Server

Specification

  • DDRDDR
    DDR4
  • ApplicationsApplications
    Server
  • DensityDensity
    64 GB
  • SpeedSpeed
    2666 Mbps
  • VoltageVoltage
    1.2 V
  • Production StatusProduct Status
    EOL
  • Rank*OrgRank x Organization
    4R x 4
  • Component CompositionComponent Composition
    (DDP4G x 4) x 36
  • No. of PinsNumber of Pins
    288

* All product specifications reflect internal test results and are subject to variations by the user's system configuration.
* All product images shown are for illustration purposes only and may not be an exact representation of the product.
* Samsung reserves the right to change product images and specifications at any time without notice.