In today’s highly competitive semiconductor market, mobile application processors (APs) are required to deliver continuous performance improvement within increasingly constrained mounting environments. As smartphone form factors become slimmer, the rise of high-performance computing and the expanding use of on-device AI are driving higher power consumption within smaller form factors, leading to increased power density and greater heat generation. Consumers increasingly expect longer battery life and thinner, lighter designs. As a result, mobile AP development now requires more than incremental performance improvements; it has become essential to achieve structural evolution that enables more efficient use of limited internal space.
With these challenges in mind, mobile AP packaging is evolving beyond its traditional role of protecting the chip to become a core technology that efficiently dissipates and manages heat while maximizing system-level space efficiency. In particular, through package architecture design and thermal dissipation optimization, mobile AP packaging helps maintain performance and reliability while enabling slimmer product designs and improving space efficiency for larger batteries, making packaging increasingly critical for mobile APs.
When more power is used to improve performance, the AP temperature rises accordingly. To lower this increased temperature, power must be reduced, which ultimately prevents a chip from delivering its intended performance. For this reason, managing thermal resistance has become a critical factor in ensuring performance stability in mobile AP design. In conventional mobile packages, solutions such as using materials with high thermal conductivity or increasing the thickness of the silicon die have been applied to improve thermal performance. However, given the industry’s trend toward miniaturization, improvements in material properties and increases in die thickness alone have inherent limitations in fundamentally resolving thermal issues.
The limitations of conventional PoP designs
For flagship APs and SoCs, the Package-on-Package (PoP) structure — where DRAM is stacked directly on top of the AP chip — has generally been used to enhance performance. However, due to the strict thickness constraints of mobile products, overall package thickness has continued to decrease with each generation. As the package becomes thinner, the AP die thickness is also reduced, which limits the heat diffusion path for transferring heat generated inside the die to the outside. As a result, heat is not effectively dissipated, causing the chip temperature to rise rapidly and reach its thermal limit, directly constraining sustained performance.
When the AP is in operation, heat generated from the silicon die inside the AP package must be quickly transferred outside to reduce chip temperature. Lower thermal resistance improves heat dissipation efficiency, helping maintain stable performance even under high workloads. To achieve this, device makers apply heat dissipation components, such as heat spreaders and vapor chambers, to transfer the heat generated by the AP to external cooling structures. However, in conventional PoP structures, the DRAM package is positioned above the AP chip, limiting the direct heat transfer path between the AP and the heat dissipation components. This structural characteristic reduces heat transfer efficiency and acts as a fundamental limitation on performance improvements at both the package and system levels.
Samsung’s HPB answers mobile APs’ need for sustained advances in performance
Samsung has significantly improved thermal management by placing the Heat Path Block (HPB) on top of the AP chip. This structure represents the industry’s first application of HPB to Fan-out Wafer Level Packaging (FoWLP), improving internal package thermal resistance and enabling stable performance even under high-load conditions.
Based on this approach, a new package type was developed to more effectively transfer heat generated from the AP die to the mobile phone’s heat dissipation components. In this structure, the DRAM package, which in conventional PoP designs was positioned above the AP chip and obstructed heat transfer, was repositioned so that it no longer overlaps with the primary heat-generating area. The HPB, which is capable of rapidly transferring heat, was then placed directly above the heat source to enable more efficient heat dissipation.
The HPB’s core benefits
Samsung developed the HPB with one goal in mind: to effectively dissipate heat generated by the AP die for stable performance. To ensure structural stability even with the application of the HPB, a new Thermal Interface Material (TIM) was also introduced, offering high thermal conductivity and excellent bonding reliability. This approach enables both enhanced heat dissipation performance and package reliability.
In a PoP structure, for heat from the bottom AP die to be transferred upward, it must pass through the intermediate DRAM package. The heat transfer path passes sequentially through the DRAM package’s bottom solder balls, the substrate, the DRAM die, and the EMC¹⁾. Along this path, the solder balls — which have relatively high thermal conductivity — are distributed only in limited regions, while the substrate’s dielectric layer²⁾, DAF used for die stacking³⁾, and EMC are all materials with low thermal conductivity. As a result, heat transfer through the interior of the DRAM package is inherently inefficient, limiting effective heat delivery to mobile device cooling components such as vapor chambers.
In contrast, the HPB applied to the Exynos 2600 is made of metal (copper, with a thermal conductivity of approximately 400 W/m·K), whose heat transfer performance is approximately 500 to 1,000 times higher than the polymer-based materials of the substrates, DAF, or EMC. As a result, heat generated by the AP die can be rapidly transferred outside the package, suppressing temperature rise at the heat source and providing favorable conditions for sustained performance.
From challenges to breakthroughs: The development journey shaping the future of Samsung’s mobile packaging
During the development of the new package, a design was applied to more efficiently transfer heat from the AP die toward the HPB direction compared to conventional PoP structures. This was achieved by reducing the DRAM package footprint to approximately half and co-optimizing the overall package height and AP package thickness. These structural changes were implemented with the goal of enhancing the thermal path while minimizing any increase in the overall package size.
Due to the asymmetric placement of the DRAM, the AP–DRAM interface was also reconfigured, and the overall chip and package architectures were redesigned to ensure both performance and reliability. In addition, the thermal-reduction effect of the HPB structure was pre-validated through multi-perspective simulations. Target performance was then stably achieved through root-cause analysis and iterative optimization across material, process, and product stages, supported by close collaboration among the relevant departments.
As performance requirements for mobile processors continue to increase under the strict form-factor constraints, package-level thermal resistance design is set to become an even more important enabler of sustained AP performance. In this regard, the HPB-based package architecture demonstrates how structural changes to the heat transfer path can effectively address these limitations.
Through the development of the HPB, Samsung Electronics has accumulated valuable technical experience, validation methodologies, and a strong framework for cross-functional collaboration. Building on this progress, the company will continue to advance AP packaging technologies to simultaneously achieve performance, thermal stability, and space efficiency in future mobile platforms.
1) An Epoxy Molding Compound (EMC) is a molding material that encapsulates chips in semiconductor packages.
2) A dielectric layer is an insulating layer between interconnects in a package substrate.
3) The Die Attach Film (DAF) is a film-type adhesive used to bond a silicon die to a substrate.
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