Memory is important; really important. But sometimes we overlook the crucial role that the memory module, or DIMM, plays in realizing the technological improvements we’ve come to expect. While the overall market outlook for DIMMs is generally stable, the expansion of AI and Cloud services is driving an increase in server capacity demand, which increases the required number of DIMMs and the need for high capacity and high speed. In the client market, as capacity requirements reach saturation, the number of required modules is relatively limited. For laptops in particular, the growing emphasis on portability is increasing the adoption of devices with slim form factors, leading to a preference for onboard DRAM (LPDDR, Low Power DRAM) solutions and the resulting restricted growth in module demand. Amid this rapid sea change in the market, it is crucial to secure stable server operations, and the role of related DIMM components has gained significant importance. In this environment, Samsung System LSI has been drawing on its years of mobile Power Management IC (PMIC) expertise to provide products and technologies that suit customer needs.
Samsung first entered the DDR5 PMIC market in 2017. After making this move, the company released its first PMIC for DDR5 DRAM modules in 2021. Previously, the mainboard supplied power to the module through the PMIC. With the transition to DDR5, however, JEDEC has mandated that the PMIC must be embedded internally within the module. As a leader in the field, Samsung manufactures products that abide by JEDEC standards and consistently aims for the best efficiency in the industry, as well as robust design. This approach is not limited to PMICs, however. The company is also expanding the lineup of products necessary for DDR5 modules, making the goal of providing customers with a total solution a top priority.
These efforts started by developing Serial Presence Detect (SPD) and Temperature Sensors (TSs) but have expanded into Client Clock Driver (CKD) development and buffer products, which have a relatively high barrier of entry. All of this is the latest indication of Samsung being ahead of the game. But in what ways do these developments place Samsung System LSI ahead?
PMIC: Core Power Infrastructure
Major cities have thousands, if not millions, of people going from Point A to Point B every single day. In cities such as these, public transportation, namely the subway system, is key to keeping the city operational — without it, the passengers could not get to where they need to go. In DIMMs, the PMIC is the subway system, transporting the power in its required amounts to each IC, primarily the DRAM and peripheral components like CKDs, SPD, and TSs. The SPD determines which passengers go where and in what quantity, so it’s similar to a subway control authority. In this system, the PMIC is a critical piece of infrastructure for ensuring that everything runs the way it should.
As PMICs have evolved, the number and type of power channels has increased accordingly, with server products generally requiring more channels and higher power capacity than client products. This is why server products use a 4-channel buck converter and a dual low-dropout regulator (2LDO)1 — and client products use a 3-channel buck converter and 2LDO.2 Initial plans were to have only one product each for servers and clients, but as DRAM modules increased in capacity and speed, it became clear that necessary power would have to be supplied in different ways, leading to the diversification of products.
With DDR4, PMICs were mounted externally, on the substrate. This was a disadvantage because when power is supplied from outside the module, the wiring length increases, and power efficiency decreases due to the contact resistance of the slot/module’s gold fingers.3 Additionally, the PMIC not being tuned to the module’s characteristics results in a lack of optimization, and there is a vulnerability to noise on the motherboard. DDR5 addresses these issues by mounting PMICs internally, directly onto the module. This adjustment improves system level efficiency and — since power integrity characteristics are improved — enables a stable supply of power to the DRAM. Safety and robust design are more competitive than any other PMIC traits, and Samsung System LSI’s PMICs are designed according to standards that exceed those established by JEDEC. For instance, the company’s input voltage is more than 180% secure.
SPD/TS: Operations Management
Since the PMIC is now built into the module, more active elements are required for communication between the host (CPU) and DRAM (DIMM). It’s also crucial to include an interface hub to control/manage the active elements within the DIMM. As a result, I2C (Inter-Integrated Circuit)/I3C (Improved Inter-Integrated Circuit) Hub functions have been added to SPD, which originally played the role of EEPROM, the storage center of DIMM’s data. Because of this, SPD doesn’t just store information; it manages active elements within the DIMM during early booting, which means that its function has increased, and that it has grown in importance.
DDR5’s predecessor already includes a temperature sensor that assesses the DIMM/system so that they function efficiently. However, DDR5’s increased speed and capacity come with higher temperature sensitivity. Since higher temperatures increase the odds of malfunction, the DDR5 sensor checks temperatures more precisely and carries out appropriate measures for each temperature level. These actions include reducing the IC operating speed or increasing cooling. This means its temperature sensor must be more precise, as indicated in the below table.4
CKD: A Performance Enhancer
In the past, client DIMMs generally entailed fewer DIMMs per CPU and relatively short wiring lengths, so buffer chips weren’t a necessity. However, as DDR5 data transfer rates increased (reaching 6400MT/s and above), the clock buffer became necessary, and JEDEC started requiring a CKD to be installed within DDR5 client modules, to ensure sufficient performance starting from 6400MT/s. In line with these changes, Samsung System LSI has taken the step forward of adopting the industry’s most advanced process in its new products, which will secure exceptional performance across a range of DDR5 standards, from 6400MT/s to 9200MT/s. The 9200MT/s standard is a particularly notable achievement, as it is the first time in the industry that full coverage of the maximum speed has been achieved.
Samsung has a legacy of developing PMIC technology and providing customers with stable products at competitive prices. The company’s pursuit of a total solution that meets industry standards exemplifies its position as a semiconductor manufacturer that prioritizes its customers, as does its consistent drive to provide turnkey product solutions that lower production costs. So then now, in the AI era, Samsung System LSI has managed to increase efficiency in their development resources through pre-verified compatibility and the operation of active components. As technology becomes increasingly advanced, this approach sets up everyone involved for success.
* All images shown are provided for illustrative purposes only and may not be an exact representation of the product. All images are digitally edited, modified, or enhanced.
* All product specifications reflect internal test results and are subject to variations by user's system configurations. Actual performance may vary depending on use conditions an environment.
1) Server Models: PMIC5000 5010 5020 5030.
2) Client Models: PMIC 5100 5120 5200.
3) Gold Fingers are the gold-plated contact points on the edge of a PCB or DIMM, which allow signals and power to pass between the memory and the motherboard.
4) JEDEC Standard TS5111, TS5110 Serial Bus Thermal Sensor, Rev. 1.3, September 19, 2020.
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