HPC’s Many Building Blocks
Shin then moved onto how SAFE can support HPC through its High Performance IP ecosystem, laying out detailed case studies of the considerations a customer might face and how Samsung can help.
“Let’s say you have a revolutionary idea for Artificial General Intelligence and you want to implement it with a Silicon,” said Shin. “Soon, you might realize that your chip is too large for a die, and this makes you consider chiplet solutions and die-to-die (D2D) IPs.”
Samsung Foundry, Shin explained, provides numerous types of D2D IP including UCIe, BoW, XSR and a foundry proprietary solution HBB, covering both multi-chip modules and Si interposers.
But what about bandwidth? Customers might require a huge bandwidth for DRAM, Shin suggested, so Samsung is ready to provide both traditional DDR and HBM options as well as LPDDR, which is gaining popularity on account of its lower power use and higher speeds. All three memory interfaces are enabled – or are being enabled – right down to 3nm in the Samsung model, providing broad DRAM access options for customers’ varying needs.
Next comes the connecting of one chip to another chip and the building of a whole system. For this, Samsung provides Serializer/Deserializer (SerDes) IP Solutions.
“PCIe, multi-protocol SerDes and 112G SerDes are supported in 5nm, 4nm and 3nm,” said Shin. “It’s important to note, too, that separate PCIe generations – from Gen4 to Gen6 – are prepared with the optimum PPA of each chip in mind.”
Finally, Samsung Foundry also provides essential analog IPs and Key Security IPs for HPC. While most analog IPs – from PLL to temp sensors – are already prepared for advanced nodes, one particular analog IP, ultra-high-speed ADC, is ready for various network applications, like 5G base stations.
In the security IP area, Shin added, hardmacro and softmacro IPs are ready and waiting to help meet rigorous HPC security standards. These include PUF with a very low error rate, on-the-fly flash/DRAM encryption for storage applications and post-quantum cryptography for the future of cryptosystems.
A Design Infrastructure to Match Any Vision
For the final section of his talk, Shin switched gears to discuss design infrastructure for High Performance IP.
“Some of you may develop special IP, and Samsung is ready to provide the top-tier infrastructure needed for partners to design them,” Shin told his audience.
The foundry has developed major electronic design automation (EDA) tools for both analog and digital design, which have been certified for 3nm, as have a variety of S-parameter extraction tools. The foundry also offers electrostatic discharge (ESD) protections.
“Large ESD has high charge device model (CDM) and human body model (HBM) tolerance, but it degrades input and output (I/O) performance, and vice versa,” explained Shin. “So, Samsung Foundry provides several ESD cells for mitigating this tough trade-off. High current ESD cell models can be used for simulation-based ESD verification, and this helps with the estimation of CDM/HBM levels at the design stage with specific package types.”
A final and particular emphasis of Shin’s presentation was Samsung’s 3nm GAA (gate-all-around) solution and ways the company supports its customers with the limitations of EGless design. While EGless design can necessitate some modifications of current designs, the payoff can be significant, as it can render the whole chip more robust in process and cheaper in cost.
“EGless design can tolerate up to 1.8V,” said Shin. “Fortunately, this covers most IP applications. This may be new territory for some IP partners and customers, but we provide comprehensive EGless design guides.”
Concluding a talk rich in detail and packed with exciting, flexible innovations for ambitious partners and customers, Shin underscored the pride Samsung Foundry has in its valued partnerships and pointed out that the company’s number of IP titles has tripled since its business began.
“Just as important, our number of customers has also tripled,” remarked Shin to the SAFE Forum 2022 audience. “We hope everyone in this room will be our partners, collaborators and customers well into the future.”